1. Field of the Invention
The present invention relates to an integrated optical semiconductor device and an integrated optical semiconductor device assembly.
2. Description of the Related Art
An optical receiving circuit is disclosed in Japanese Unexamined Patent Application Publication No. 2013-5014. The optical receiving circuit includes a transimpedance amplifier (TIA) chip connected to a light receiving device and a ground pad disposed on the upper surface of the TIA chip. This ground pad is connected to another ground pad disposed on the upper surface of a PD submount through a bonding wire.
In recent years, the light receiving device used for optical communication is monolithically integrated with an optical processing device on a semi-insulating InP substrate. For example, the optical processing device includes a multimode interference (MMI) coupler. This multimode interference coupler converts a phase difference of a phase-modulated external optical signal to optical intensity and generates a plurality of optical signals related to a signal symbol. The light receiving device receives optical signals from the optical processing device and generates electric signals converted from the individual optical signals. The light receiving device (photodiode) includes a stacked semiconductor layer structure including an n-type semiconductor layer, a p-type semiconductor layer, and a non-doped optical absorption layer disposed between the n-type and p-type semiconductor layers. The stacked semiconductor layer structure includes a p-n junction. In addition, the light receiving device operates under applying a voltage through the p-n junction to generate the electric signals. On the other hand, the multimode interference coupler includes a stacked semiconductor layer structure constituting an optical waveguide to propagate optical signals. The multimode interference coupler is a so-called passive device that operates without applying a voltage. Both photodiode and multimode interference coupler are monolithically integrated on a semi-insulating semiconductor substrate.